The Cornell Theory Center announced today plans for a major upgrade to its supercomputing resources that will triple the computational capability that it makes available to the national research community. This week, the Theory Center began that improvement of its 512-processor IBM RS/6000 POWERparallel System (SP) with the successful installation of its first rack of Power2 Super Chip (P2SC) nodes. When completed this spring, this upgrade promises to move Cornell's Theory Center within reach of tera-scale computing.

Tera-scale computing will be achieved by integrating teraflops computational capabilities with petabyte mass storage capabilities and visualization resources using the highest-end networks. The upgrade that begins now ushers in a new era in computational science, according to Theory Center Director Malvin H. Kalos.

"We are crossing the threshold of being able to solve vastly more complex problems in science and engineering," he said. "Combined with the the Cornell Theory Center's interdisciplinary approach to algorithm and software development, tera-scale computing will allow us to exploit this leap in quantitative capability to create qualitative improvements in how science is done."

One example of a field where breakthroughs are expected to occur is fracture mechanics, which explores how cracks propagate across a broad range of materials, scales and environments. Fracture dynamics needs to be understood at many scales, from that of electronic structure and atomic motions, where the physics of crack initiation and growth over microseconds must be simulated, to human scales, where engineers model the behavior of airplane wings and related structures over minutes or even months and years. Increased computational power will allow researchers to design simulations that incorporate phenomena on many scales, making them more realistic and predictive than ever before.

When complete, the Theory Center's upgrade will replace all of the current processors with 512 Power2 Super Chip nodes and will include IBM's most advanced high-speed switch. The P2SC integrates the eight-chip POWER2 technology into a single chip, with six instructions per cycle execution capability, 160 kilobytes of on-chip cache and a total transistor count of 15 million. With aggregate peak performance of one-quarter teraflops and quadruple the current bandwidth, these enhancements to the Theory Center's computational environment will provide three times the existing capabilities on many codes, allowing the community to attack ever-larger computational problems.

Since going into production in 1995, the Cornell Theory Center's SP has been used by thousands of researchers across the country working on a broad range of problems. The Theory Center focuses especially on large parallel computations. Researchers interested in applying for allocations can find information at .

The Cornell Theory Center is a national high-performance computing and communications center located at Cornell University and supported by the National Science Foundation, the National Institutes of Health, New York state, IBM, and members of its Corporate Partnership Program.