If your Pentium II or Pentium Pro computer runs noticeably faster than earlier models, you might want to send a thank-you note to Hwa C. Torng, Cornell University professor of electrical engineering. An ingenious bit of computer-chip architecture invented by Torng is one of the reasons for that increased speed.
On Dec. 2 officials of Intel Corp., which makes the Pentium microprocessor chips, acknowledged Torng's contribution at a small ceremony in Ithaca. A plaque presented to Torng by John Miner, vice president and general manager of Intel's Enterprise Servers Group, and Justin Rattner, Intel Fellow and director of the company's Server Architecture Laboratory, recognized Torng "for his contributions to the state-of-the-art in high speed instruction decoding and execution."
Torng also was named the first Intel Academic Research Fellow.
"Cornell is very pleased to see the inventiveness of one of its distinguished faculty members recognized by the industry's leading chip maker," said Norman Scott, Cornell vice president for research and advanced studies. "Professor Torng's patent is a very important contribution to improving both efficiency and speed of operations."
Cornell holds a patent on the invention and has licensed it to Intel. In addition to the Pentium II and Pentium Pro, the new architecture will be used in their successor, a chip code-named Merced.
"This is not the only reason the new chips are faster," Torng pointed out. "Whether it helps in a particular job depends on the program you are running. But it definitely doesn't hurt."
The complex jobs performed by any computer eventually break down to a series of very simple instructions executed by a microprocessor. Each instruction tells a group of transistors to take a number from a memory storage slot called a register, perform some mathematical operation on it and put the result in some other register.
In older computers, instructions are carried out in rigid order, each one waiting until its predecessor is done. Newer designs include many calculating units, so several instructions can be executed at the same time.
If instructions a, b, c and d are waiting in line and certain conditions are met, they can all be issued and executed at once. But if b needs to operate on the results of a, and c needs to operate on the results of b, the processor holds back until a is finished, and everything behind b also waits, including d -- even if d has nothing to do with a, b or c. The instructions are stored in a memory structure called a "stack," and if b is on top of the stack, the processor can't look at anything after it until it has processed b and moved it off the top.
Torng got around this with circuits that read the instructions as they come in and evaluate their relationship to one another very rapidly. This allows the processor to detect the fact that d doesn't have to wait and to execute it "out of order."
His design also makes it easier to do what's called "speculative execution of instructions." Modern programs do a lot of "branching," where the processor executes one set of instructions or another depending on the results of some calculation. Torng's design does not help the processor guess which way to go ahead of time, but it does make wrong guesses much less painful, he said.
Torng first came up with the idea in 1982 but had trouble getting it accepted. "It was hard for me to get it published," he recalled. "They asked me how many transistors you would need on a chip to do it, and I said about 250,000 for a small implementation. They just laughed."
In those days the most advanced microprocessor had about 150,000 transistors on a chip. Today's chips typically incorporate 7 or 8 million transistors in about the same space, so Torng's idea has become a valuable way to improve processor performance.
Torng (pronounced "Torn") teaches an introductory course on digital systems and an advanced course on the architecture of high-capacity information networks.